fpga_diff: add UVHS XiangShan and GBus support - #163

Route GBus workload writes through the existing CPU-subsystem DMA AXI
interface instead of a dedicated physical-DDR master. NutShell inserts a
generated 256-to-64 AXI converter after the host-to-CPU CDC; KMH keeps
the native 256-bit path and fails the file list when dma_* is missing.
XDMA retains data_bridge, and GBus no longer exports or imports it.

Remove the unused AXI3 arbiter, remote-link, and 64-to-256 converter
left over from the rejected topology. The common UVHS DDR block is
unchanged.

UVHS P4 still aborts infer_clock/transform_clock on protected GENERALBD
sysbus LAST_VALUE pins even after exact config_clock -ignore. Keep the
TCK diagnostics in the log and continue partition/PnR for GBus only.

U_UVHS_FLASH_GBUS is the UVHS ROM/flash path, not the DiffTest host
interface. Gating it with CONFIG_DIFFTEST_HOSTIF_GBUS dropped the F0
clk6_n pair and failed bitstream DRC on IOSTDTYPE-1.

Move the UVHS-prefixed wrappers out of src/rtl/common. Generate
GeneralBus and GeneralBD from the local UVHS installation instead of
checking in DCP binaries. Restore the existing UART clk6_p frequency
so this PR does not retune UART.

Move uvhs_gbus_axi_dwidth.tcl out of the shared Vivado IP directory.
Export looks up the generator from uvhs/tcl; XDMA IP Tcl stays in
src/tcl/common.

The MIG MMCM reset reaches the UVHS TDM TX synchronizer through a
status LUT, so exact fanout matching missed uvtdm_tx_ctrl. Apply
false_path from the DDR reset flop to both TDM synchronizer families.

Restoring the two blank lines next to the CPU-bridge and ROM AXI
declarations so this PR does not rewrite shared formatting.

UVHS TSO-29/TSO-8 check the mmcm_clkout0 to gtye4_ch_txoutclk pair with
an empty exception list. A flop-to-D false_path does not satisfy that
checker, so also cut the linked clock pair after the netlist is linked.

dma_core_* uses the CPU physical map, so host offset 0 currently lands
on address 0 instead of guest RAM. Add 0x80000000 on the GBus AXI3
adapter before dma_core and keep GBUS_DDR_BASE at 0.

GBus H2C occupies the inbound dma_core_* slave inside XSTop. Mapping
offset 0 onto CPU DRAM then times out while HOST_IO_RESET holds the
whole SoC. Leave the fabric and DMA slave on cpu_rstn during the load
so AXI writes can complete; cores remain halted by hostCtrl.reset.

dma_core_* is an L3 frontend, so HOST_IO_RESET drops the loaded image
before fetch. Occupy the existing DifftestMemCtrl AXI-stream H2C port
instead and leave dma_core idle.

Backend required the deleted U_GBUS_H2C_CDC cell after GBus started
occupying DifftestMemCtrl's AXI-stream engine. Keep U_GBUS_H2C_AXIS
with the F2 host path instead.

Keep the mainline XDMA endpoint, pinout, IP export, and wrapper
control path as the default. Select GBus only with DIFFTEST_HOSTIF=GBUS,
which Makefile maps to DIFFTEST_HOST_GBUS for exclusive `ifdef /
`elsif / `endif RTL. Drop leftover dummy adapter, blackbox stubs, and
the 256-to-64 width converter. Docs match SRAM C2H plus AXI-stream H2C.

Drop the AXI3-to-AXI4 shim and the Vivado hostif parser. Keep XDMA
scripts on the mainline path and cross GBus clocks with a Gray FIFO.

GBus still crosses the host-clock BAR; XDMA drives the same CPU-side
wires. Keep dma_core idle because H2C uses the AXIS engine.

Move the GBus DiffTest host implementation out of the shared core into
uvhs/common/uvhs_gbus_host_wrapper.sv, instantiated as core_def/U_GBUS_HOST.
The C2H staging FIFO, GeneralBD configuration bridge, both protected GBus
endpoints, the AXI3-to-AXIS H2C converter, the H2C AXIS CDC, and the host
AXI-Lite CDC move together, so the GBus protocol and its register semantics
are unchanged.

Host selection stays CPU-independent: the shared core instantiates either the
XDMA endpoint or this wrapper, and the only compile-time switch remains
DIFFTEST_HOST_GBUS versus DIFFTEST_HOST_XDMA. The XDMA path, the clock-gate and
reset-masking integration, the generated dma_core_* idle behavior, and the KMH,
NutShell, and Nanhu wrappers are untouched.

The UVHS clock, protected-payload, and F2 partition paths follow the new
hierarchy, and GBus file lists now require the wrapper module.

The physical XDMA PCIe boundary is not host-mode dependent, so keep the ports
declared under XS_XDMA_EP alone in fpga_top_debug and core_def, and assign their
pins in both host modes.  GBus does not instantiate the endpoint, which leaves
the ports unused instead of removing them from the top level.

This matches uvhs/compilation/timing.tcl, which already creates pcie_ep_refclk
unconditionally.  A GBus build with these ports present and pin-assigned has
already completed the UVHS backend, where the unused ports are reported only as
"no load" warnings.

data_bridge is XDMA-only, so in a GBus build nothing drives the shared
master-side channel that feeds the generated DMA slave.  Express the idle state
with a single concatenated zero assignment instead of 26 per-signal tie-offs.

The wires stay: the generated SimTop DMA ports are present in GBus builds too
(CONFIG_SIMTOP_HAS_DMA is defined there), so they still need a defined idle
driver.  The DMA slave and the CPU wrappers are unchanged.

core_def kept a GBus-only copy of the XDMA_AXI_LITE_* host wires after the GBus
protocol moved into uvhs_gbus_host_wrapper.sv.  Nothing in core_def referenced
them any more (the XDMA endpoint's own port names connect straight to
difftest_cfg_axilite_*), so remove the declarations.

data_bridge is a SoC-side block that main instantiates in every DiffTest build,
so drop the empty GBus branch and keep the instance under `ifndef NO_DIFF alone.
GBus builds now instantiate it, so export_vivado_ip.tcl exports it for both host
modes and frontend_run.tcl imports it for both; only xdma_ep stays
XDMA-specific.

The two core_def host branches ended in `elsif DIFFTEST_HOST_XDMA, which forced
the Vivado project to define DIFFTEST_HOST_XDMA just to reach the XDMA path.
XDMA is the default DiffTest interface, so make it the `else branch and revert
xs_uart.tcl to main: the Vivado flow now builds XDMA with no host define, and
GBus stays opt-in through DIFFTEST_HOST_GBUS.

The UVHS file list still emits DIFFTEST_HOST_XDMA for an XDMA build; the RTL no
longer reads it.